Nvidia Unveils Hopper H100 Datacenter GPU With 80 Billion Transistors
Nvidia introduces the Hopper H100, a massive 80-billion-transistor datacenter GPU built on TSMC's 4N process. The new chip significantly outpaces the previous A100 with upgraded NVLink, PCIe 5.0, and HBM3 memory.
Nvidia reveals the Hopper H100 GPU at its GPU Technology Conference, showcasing a massive 80-billion-transistor chip built on a custom TSMC 4N manufacturing process. This new architecture specifically targets datacenters and supercomputers rather than consumer graphics cards, serving as the direct successor to the Ampere A100. The H100 focuses heavily on advancing artificial intelligence and high-performance computing capabilities.
The H100 brings major connectivity upgrades, including support for fourth-generation NVLink that delivers up to 900 GB/s of bandwidth. For systems that do not utilize NVLink, the chip supports PCIe 5.0, which provides up to 128 GB/s of data throughput. These improvements represent a 1.5X increase in NVLink bandwidth over the A100 and double the bandwidth compared to the previous PCIe 4.0 standard.
Nvidia equips the H100 with 80GB of HBM3 memory right out of the box, achieving an impressive 3 TB/s of memory bandwidth. This memory speed marks a 50 percent improvement over the HBM2E memory found in the older A100 model. While Nvidia keeps core counts and clock speeds under wraps for now, the sheer scale of the transistor count and memory upgrades signals a strong push to counter growing competition from AMD's Instinct accelerators.